The use of programmable variable resistance materials in electronic devices is known in the art. The chalcogenides are an important class of programmable variable resistance materials. The principles of operation of chalcogenide materials and devices are described in U.S. Pat. No. 5,296,716, No. 5,341,328, No. 5,359,205, and No. 7,227,170, all to Ovshinsky et al., which are incorporated herein by reference. These patents are believed to evidence the state of the prior art and to represent current theory of operation and function of chalcogenide materials and chalcogenide-based memories known to those skilled in the art.
Briefly, variable resistance materials are materials that can be caused to change physical or electronic state, and therefore resistivity level, in response to an electrical input stimulus. By way of example, chalcogenide phase-change materials may be electrically stimulated to transform among structural states ranging from a predominantly crystalline state to a predominantly amorphous state. By controlling the amount of electrical energy applied to a chalcogenide phase-change material, the relative proportions of crystalline and amorphous phase content can be continuously varied from a low crystalline phase volume fraction to a high crystalline phase volume fraction. The resistivity of a chalcogenide phase-change material correlates with the crystalline phase volume fraction and progressively decreases as the crystalline phase volume fraction increases. A chalcogenide phase-change material may be predictably placed in a particular resistivity state by running a current of a certain amperage for a certain duration through it. The resistivity state so fixed will remain unchanged unless and until a current having a different amperage or duration within the programming range is run through the material.
Because of these unique characteristics, variable resistance memory materials may be used in memory cells for storing data in binary or higher-based digital systems. Such memory cells will normally include a memory element that is capable of assuming multiple, generally stable, states in response to the application of a stimulus. In most cases, the stimulus will be a voltage differential applied across the element so as to cause a predetermined current to flow through the memory element. A chalcogenide-based memory cell will typically include a chalcogenide memory element utilizing a chalcogenide phase-change material for storing data and an access element, coupled to the memory element, for use in programming and sensing the stored data. Embodiments of the access element include diodes, transistors, and Ovonic threshold switching devices.
Programmable resistance materials may be used as the active material of a memory device. Write operations in a memory device, also called programming operations, which apply electric pulses to the memory device, and read operations, which measure the resistance of the memory device, are performed by providing current or voltage signals across the two electrodes. The transformation between the relatively resistive state and relatively conductive state of a switching material is similarly induced by providing a current or voltage signal between two electrodes in contact with the switching material.
To achieve high density storage of data, memory arrays comprising a multitude of chalcogenide memory elements may be fabricated. In a memory array, a grid of conductive row lines (wordlines) and column lines (digit lines or bit lines) is formed in which a series combination of an access element and a chalcogenide memory cell is located at each junction of a row line and column line. The row lines and columns lines are connected to external circuitry (such as drivers or sense amplifiers) and individual memory cells are programmed or read by selective application of voltages to the row line and column line between which the memory cell is interconnected. Selection of the row line and column line of a particular memory cell produces a voltage differential that activates the access element, thus enabling current to pass through the memory element. Access elements at non-selected junctions of the array prevent stray current from altering the state of memory elements located at non-selected junctions.
Because of the unique operating characteristics of memories based on variable resistance memory elements, control of current flow is crucial to facilitate programming. Programming of chalcogenide phase-change materials, for example, requires high current densities.
One of the significant practical challenges that the programmable resistance memory and switching devices face is to reduce the contact area of one or more electrodes contacting the chalcogenide material. By reducing the contact area, the energy required to program a memory device or switch a switching device can be reduced and more efficient devices can be achieved.
Fabrication of semiconductor devices such as logic and memory devices typically includes a number of processes that may be used to form various features and multiple levels or layers of semiconductor devices on a surface of a semiconductor wafer or another appropriate substrate.
Physical (PVD) and chemical (CVD) vapor deposition methods, and also the deposition of conductive coatings through various decomposition processes of gaseous, liquid or solid precursors may be used in the formation of semiconductor devices.
Additional examples of semiconductor fabrication processes include chemical-mechanical polishing, etching, deposition, ion implantation, plating, and cleaning. Semiconductor devices are significantly smaller than a typical semiconductor wafer or substrate, and an array of semiconductor devices may be formed on a semiconductor wafer. After processing is complete, the semiconductor wafer may be separated into individual semiconductor devices.
In semiconductor device fabrication, it is desirable to reduce the length scale or feature size of devices as much as possible so that a larger number of devices can be formed on a given substrate area. As the feature size of devices is minimized, however, processing of the devices becomes more difficult. Small scale features become more difficult to define as the lithographic limit of resolution is reached and features that are defined become more difficult to process.
In this regard, it is desirable that a variable resistance memory cell include small areas of contact between the variable resistance material and the surrounding electrodes. It is further desirable to achieve small area electrode contacts in a planar configuration to facilitate subsequent deposition and adhesion of the variable resistance material to the electrode surface. Presently, the methods available for forming uniform, planar contacts are difficult to scale down to the size regime desired for minimizing programming currents. As a result, a tradeoff exists between electrode configuration and device current. While it is possible to make small contact areas, the uniformity and quality of the contact surface degrades as the contact area decreases. Conversely, achievement of uniform, planar contact surfaces requires relatively large contact areas that, in turn, lead to higher programming currents.
Also, practical size limits on the feature size of a device are controlled by the lithographic limit. From a device current perspective, it is desirable to have contact areas below the lithographic limits. Sublithographic dimensions, however, require complicated and expensive processing, thereby increasing the number and complexity of processing steps required for manufacture. Accordingly, there is a need for a stable and easily manufactured small contact area device with a planar electrode configuration. Such a device will demonstrate the advantages of variable resistance memory devices over competing memory technologies and further the goal of commercialization.